CYW20719 Product Guide

This document introduces the CYW20719 ultra-low power dual-mode BT v5.0 wireless MCU with an Arm® Cortex®-M4 CPU by exploring both CYW20719 device architecture along with the development tools to write applications using WICED Studio™. The document also lists the available resources which can be used to accelerate development and in-depth learning with the device.




Application Notes:


Projects and Example Apps:


Other Useful links and Applications:


1. Introduction

The Cypress CYW20719 is an enhanced ultra-low power (ULP), highly integrated, and dual-mode Bluetooth wireless MCU. It allows you to implement the industry’s small-footprint, lowest-power Bluetooth Low Energy (BLE) and dual mode Bluetooth applications quickly by leveraging the all-inclusive development platform WICED Studio. CYW20719 is a Bluetooth 5.0 compliant SoC with support for Bluetooth Basic Rate (BR), Enhanced Data Rate (EDR), and BLE. CYW20719 supports all optional LE features as per Bluetooth core specification v4.2 and the LE 2 Mbps feature as per specification v5.0.


Manufactured using an advanced 40 nm CMOS low-power process, the CYW20719 employs the highest level of integration to eliminate all critical external components, thereby minimizing the device's footprint and the costs associated with implementing Bluetooth solutions. A 96 MHz CM4 CPU coupled with 1-MB on-chip flash and 2-MB ROM for stack and profiles offers significant processing power and flash space to customers for their applications. CYW20719 is the optimal solution for a range of battery-powered single/dual mode Bluetooth internet of things applications such as home automation, HID, wearables, audio, asset tracking, and so on.

2.    Development Tools


2.1.  Software


Download the latest WICED Bluetooth SDK, Technical Brief and API Reference


2.2.  Hardware

Cypress provides an evaluation and development kit for CYW20719. The kit is fully supported in WICED Studio 6.1 (or later). WICED Studio includes an extensive set of code snippets that can help evaluate device functionality and develop your applications quickly.



Please refer to CYW920719Q40EVB-01 Evaluation Board User Guide for more details on the usage of the Kit. In addition to evaluation kit design files, refer to HW design guidelines Appnote for creating your own hardware.


2.3.  Block Diagram


Figure 1: Block Diagram of CYW20719

3. MCU Subsystem

3.1.  Overview

The CYW20719 includes CM4 that can run at a speed of up to 96 MHz. The CM4 also includes a single precision IEEE-754 compliant floating-point unit (FPU). WICED Studio pulls in the functions needed from the standard libraries to make use of the FPU capability. The CM4 runs the stack layers and application code.


By default, the CM4 runs at 48 MHz, however, there is an API (wiced_update_cpu_clock()) provided in WICED Studio to control the operating frequency of the core. See ${INSTALLDIR}\Doc\20719-B1_Bluetooth\API.html for details.

A standard serial wire debug (SWD) interface provides support for debugging.


3.2. CYW20719 Software Architecture

3.3. CYW20719 Memory Layout


4. System Resources and Peripherals


4.1 CYW20719 and CYW20735 Analog to Digital Converter(ADC)

4.2 CYW20719 and CYW20735 Clocks, RTC, WatchDog Timer, Application Timer and PWM

4.3. CYW20719 Serial Peripheral Interface (SPI)

4.4. CYW20719 I2C Compatible Master

4.5. CYW20719 and CYW20735 Peripheral and HCI UARTs

4.6. CYW20719 General-Purpose Input/Output (GPIO)


4.7. MIPI

CYW20719 contains a MIPI DBI-C hardware block to drive embedded displays.  There are three options in DBI type-C corresponding to 9-bit, 16-bit, and 8-bit modes. The CYW20719 plays the role of host, and only the 9-bit and 8-bit modes (option 1 and option 3 in DBI-C spec) are supported. In the 9-bit mode, the SCL, CS, MOSI, and MISO pins are used. In the 8-bit mode, an additional pin DCX, indicatiing whether the current outgoing bit stream is a command or data byte is required


The WICED Studio SDK provides an example for using this interface and also refer to the CYW20719 MIPI Display Interface Guide

5. Low Power Modes

This device supports multiple power modes depending the application use case. The Power Management Unit (PMU) core manages power and clock resources for the entire chip, including Clock/reset management and power management.The CYW20719 has an advanced PMU, which automatically controls the power switches of all the resources. Please refer to Low Power Appnote for more details on low power handling.




Power Domain


Operational Power Modes




If ACLK is used, then the hardware block can operate until the PMU enters Sleep. If LHL clock is used, then the hardware block can operate until the PMU enters SDS.



I2C, SPI, PUART, WDT, ARM GPIO, Dual Input 32-bit Timer

The hardware blocks can operate until the PMU enters Sleep.




The hardware blocks can operate until the PMU enters SDS.




The Aux ADC can operate until the PMU enters sleep.

Table 1: Operational power modes of SoC peripherals

6. Radio features

6.1.  TX Power

CYW20719 has an integrated power amplifier (PA) and the maximum power output is +4dbm for class 2 operation. It supports TX power from +4dBm to -24dBm. The resolution is 4dBm, that is, the configurable TX power levels are {+4 dBm, 0 dBm, -4 dBm, -8 dBm, -12 dBm, -16 dBm, -20 dBm, -24 dBm}.


WICED Studio provides the following APIs for controlling the TX power:

  • wiced_bt_set_tx_power(): This API can be used to set the TX power on data channels for a particular connection. It takes the peer device’s BD(Bluetooth Device) address as an input parameter. This API can also be used to set the TX power on Advertisement channels by passing the BD_ADDR as 0.
  • wiced_bt_dev_set_adv_tx_power(): This API can be used to set the TX power during Advertisement.

6.2.  Coexistence Features

See AN214852 for Coexistence interfaces and how to use them with the CYW20719