Flushing the Committed Endpoints of FX2LP - KBA222444

Version 2

    Version: **


    Translation - Japanese: FX2LPのコミットされたエンドポイントのフラッシュ - KBA222444 - Community Translated (JA)



    How can I clear or flush data from the committed endpoints when FX2LP is operating in AUTO mode, and if the host application fails to read the same within a specified time?



    There can be situations where FX2LP is operating in AUTO mode and data is streamed into the FX2LP device from an external interface and is automatically committed to the host, but the host application is not ready to read the data. Since FX2LP is operating in AUTO mode, the firmware has no control over the endpoint FIFOs. If the host has not read the committed data from the FX2LP device for a specified time and the data needs to be discarded; FX2LP must be switched to manual mode to have control over the endpoint FIFOs. Follow the below sequence to clear the same:


    1. Set the NAKALL bit
    2. Switch to manual mode
    3. Reset the FIFOs
    4. Switch to auto mode
    5. Release the NAKALL bit


    Example Code Snippet:


    TD_Poll ( ) :

    … … …

    if (FIFO_RESET)


    //This is an example code segment which resets the EP6 FIFO

    //where EP6 has been configured as AUTOIN

    //Note: Settings of other bits of EPxFIFOCFG are ignored here

    FIFORESET = 0x80; // activate NAK-ALL to avoid race conditions


    EP6FIFOCFG = 0x00; //switching to manual mode


    FIFORESET = 0x06; // Reset FIFO 6   It has to be noted that the NAKALL bit should be set to 0 at this stage. Setting it to 1 will not

    SYNCDELAY;        // result in the desired operation

    EP6FIFOCFG = 0x0C; //switching to auto mode


    FIFORESET = 0x00; // Release NAKALL.