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Successive Approximation Register ADC 12-bit Resolution over 0-VDDA – KBA222392

Successive Approximation Register ADC 12-bit Resolution over 0-VDDA – KBA222392

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Translation - Japanese: 0-VDDAでの 逐次比較レジスタ型ADC 12ビット分解能– KBA222392- Community Translated (JA)

Question:

How can I get a 12-bit resolution on PSoC® 4 successive approximation register (SAR) ADC when operated in a singleended unsigned mode for an input range of 0-VDDA?

Answer:

To get a 12-bit resolution from SAR ADC, connect the single-ended negative input to Vref. The range of the resultant register counts are listed in the table.

Single/Differential

Signed/Unsigned

Single-ended Negative Input

-Input

+Input

Result Register

Single

Signed

Vss

Vss

Vref

Vss

-noise

0x07FF

0x0000

0xFFxx

Single

Signed

External

Vneg

Vneg+Vref

Vneg

Vneg-Vref

0x07FF

0x0000

0xF800

Single

Unsigned

Vref

Vref

2*Vref

Vref

Vss

0x0FFF

0x0800

0x0000

Single

Signed

Vref

Vref

2*Vref

Vref

Vss

0x07FF

0x0000

0xF800

Differential

Unsigned

N/A

Vx

Vx+Vref

Vx

Vx-Vref

0x0FFF

0x0800

0x0000

Differential

Signed

N/A

Vx

Vx+Vref

Vx

Vx-Vref

0x07FF

0x0000

0xF800

When the Vref select value is set to VDDA/2, the range translates to 0 to VDDA, which is the full 12-bit resolution.

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The SAR ADC is a fully differential architecture, optimized to provide 12-bit accuracy in the differential mode of operation. The input range of the SAR ADC is Vn ± Vref. The SAR ADC can be configured in a single-ended mode by fixing the negative input. When the negative input is fixed to VSS, conversions are only 11-bit accurate as the signal at the positive input cannot go below VSS. By fixing the negative input to VDDA/2, you will get the full 12-bit resolution on the range 0 to VDDA.

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