What are the aspects to be taken care, apart from guidelines mention in the Schematics and Layout Review Checklist section in AN70707 - EZ-USB® FX3™/FX3S™ Hardware Design Guidelines and Schematic Checklist, when FX3 is connected to a Hub onboard in a design?
In few designs, FX3 might be connected onboard to the Downstream (DS) port of a Hub. In such cases, the following aspects must be taken care:
1. Connect the Hub’s TX line of DS port to FX3’s RX and vice versa. Often, the Hub’s TX and Rx lines are incorrectly connected to FX3’s Tx and Rx lines, respectively.
2. Place the 0.1uF capacitors on SSTXP and SSTXM lines of FX3 and make sure they are placed close to the FX3 device. For more details, see the USB 3.0 SuperSpeed Design Guidelines section in AN70707 - EZ-USB® FX3™/FX3S™ Hardware Design Guidelines and Schematic Checklist.
3. According to AN91378 - HX3 Hardware Design Guidelines and Schematic Checklist, SS traces of HX3 require additional AC coupling capacitors (0.1 µF) on the TX lines (on both Upstream (US) port and DS port). For DS ports, place these capacitors symmetrically and near to the connector. For US ports, place them near the device. For more details, see the corresponding application note.
4. Place the 0.1 uF capacitors even though no connector is used for the DS port (as FX3 is directly connected onboard. As there is no connector, place the capacitor anywhere on the Tx lines of the DS port of the Hub)
5. Make sure the TX and RX look like the connection shown in the figure.
In the above figure, the value of each cap is 0.1uF
6. According to the USB specification, each DS port must have a minimum capacitance of 120 μF on the VBUS pin to maintain stable voltage under maximum load condition. This 120uF capacitor is required when FX3 is connected to the Hub with a connector. But when it is connected onboard, there is no need for this capacitor. VBUS pin of FX3 can be directly connected to VBUS_DS line of the Hub.
For more details, see the Downstream VBUS and Shield Termination section in AN91378 – HX3 Hardware Design Guidelines and Schematic Checklist