What happens when IFCLK is disconnected during data transaction and reconnected?
When FX2LP is configured to operate in the slave FIFO mode of operation with external IFCLK, it is essential that the external clock is present before the firmware is loaded into the device. Also, make sure that IFCLK is free running at a frequency between 5 MHz and 48 MHz.
There may be situations in which the external clock is disconnected during data transfer and reconnected later. In such cases, if the data that was already committed to the host (before the clock was removed) is read by the host PC application (when the external clock is absent), there will be a loss of buffer space. Due to the absence of external clock, the pointer to the buffer is not redirected to the original location and hence is unavailable to the external interface. This would cause the loss of buffer space in FIFO, that is, a quad buffered FIFO may then contain only a reduced number of buffers (say two or three). Repeating this process would eventually cause the loss of all buffer space in FIFO.
Hence, make sure that if the external IFCLK source is disconnected, the host application does not try to read data from the already committed buffers.