Translation - Japanese: Traveo S6J3XXXシリーズおよびCY9D560シリーズMCUのメモリプロテクション機能 - KBA222267 - Community Translated (JA)
Do the Traveo™ MCUs have a protection function to prevent program execution in memory area and stack area?
The Traveo MCUs have the memory protection unit (MPU), a function of Arm® Cortex®-R5F CPU core, which can be set to prevent program access to specified areas. The MPU can control the access to a maximum of 16 regions.
MPU can control access in the following series of Traveo MCUs:
The prefix MB of the product has been changed to CY. For instance, MB9D560 has been changed to CY9D560.