Memory Protection Function in Traveo™ S6J3110/3120/3200/3300/3310/3320/3330/ 3340/3350/3360/3370/3400/3510 Series and MB9D560 Series MCUs - KBA222267

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Do the Traveo MCUs have a protection function to prevent program execution for memory area and stack area?



The Traveo MCUs have the memory protection unit (MPU) of Cortex-R5F CPU core that can set specified selected area to prevent program access. The MPU can control the access to maximum 16 regions.