Firmware Control of Hardware Output Pin in PSoC 3/5LP– KBA221509

Version 4

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    Translation - Japanese: PSoC 3/5LP ファームウェアによるハードウェア出力ピンの接続制御 - KBA221509 - Community Translated (JA)



    How do you dynamically control a GPIO connected to hardware output using firmware in PSoC® 3/5LP?



    GPIO output data can be driven from either the data output register or internal sources such as digital global bus. Bit 7 of Port Pin Configuration Register called as the bypass bit selects the source of output data. When the bypass bit of the port pin is set, the selected digital system interconnect (DSI) drives the corresponding port pin. When this bit is cleared, the corresponding bit of the port logic data register drives the corresponding port pin.


    1. If the bypass bit corresponding to the pin is set to 1: the DSI signal drives the GPIO pin. For example, the PWM output can drive the pin. By default, this is handled by the fitter file in PSoC Creator if you connect PWM to a pin as shown in Figure 1.


    Figure 1: PWM Connection to GPIO


    Note that there will be no effect if you change the pin state through firmware using the PWM_Out_Write API as illustrated in Figure 2.


    Figure 2: Pin Write to Hardware Controlled Output Pin


    2. In this scenario, to control PWM_Out through firmware using the associated PWM_Out_Write API, clear the bypass bit. If the bypass bit corresponding to the pin is cleared (0), the Port DR (Data Register) can drive the pin.


    Figure 3: Firmware Control after Clearing bypass bit of Port Pin Configuration Register

    To revert to previous PWM control, set the corresponding bypass bit after restarting the PWM. You can use this approach to control a hardware-connected pin in PSoC Creator schematic through firmware.