Differences between CY62147G and CY62146G Asynchronous Memory Parts – KBA219723

Question:

What are the differences between CY62147G/CY62147E/CY62157E /CY62167E and CY62146G/ CY62136F/ CY62146E Asynchronous SRAMs?

 

Answer:

The devices differ from each other in terms of Byte-power down feature. For MPNs CY62XX7X, disabling BHE#/BLE# at the same time deselects the device and places it in standby mode. The device consumes ISB2 current. For MPNS CY62XX6X, disabling BHE#/BLE# has the same effect as disabling OE#. It only disables the I/Os but the device is still selected. This difference in byte-power down feature affects the duration taken by device to provide data output on BHE#/BLE# assertion (tDBE).

The tDBE (BLE#/BHE# LOW to data valid) parameter is different for both devices. For a comparison of the tDBE parameter, see the table below:

 

Parameter

Description

MPN

Period

tDBE  

BLE / BHE LOW to data valid       

CY62147G

CY62147E

CY62157E

CY62167E

CY62167EV

45ns

45ns

45ns

45ns

45ns

tDBE           

BLE / BHE LOW to data valid       

CY62146G

CY62136F

CY62146E

       

22ns

22ns

22ns


See the figure below for the tDBE parameter.

 

  

Figure 1. Read Cycle (OE# Controlled)

 
 

 

See the device datasheets for more details timing parameters.

 

The two series of MPNs also differ in terms of truth table. In CY62147G/CY62147E/CY62157E/CY62167E, if BHE# and BLE# are high then the part is deselected or powered down. Whereas in CY62146G/CY62136F/CY62146E, only the I/Os are disabled provided the WE# is high and the chip is selected. So, the CY62146G/CY62136F/CY62146E part will consume more current than the other parts which will only consume standby current for this combination of BHE# and BLE#. See the datasheet for more details.

 

Truth Table – CY62146G/CY62146GE/CY62146GSL/CY62146GESL

CE1#

CE2

WE#

OE#

BHE#

BLE#

Inputs/Outputs

Mode

Power

H

X]

X

X

X

X

HI-Z

Deselect/Power-down

Standby (ISB)

X

L

X

X

X

X

HI-Z

Deselect/Power-down

Standby (ISB)

L

H

H

L

L

L

Data Out (I/O0–I/O15)

Read

Active (ICC)

L

H

H

L

H

L

Data Out (I/O0–I/O7);
HI-Z (I/O8–I/O15)

Read

Active (ICC)

L

H

H

L

L

H

HI-Z (I/O0–I/O7);
Data Out (I/O8–I/O15)

Read

Active (ICC)

L

H

H

H

X

X

HI-Z

Output disabled

Active (ICC)

L

H

H

X

H

H

HI-Z

Output disabled

Active (ICC)

L

H

L

X

L

L

Data In (I/O0–I/O15)

Write

Active (ICC)

L

H

L

X

H

L

Data In (I/O0–I/O7);
HI-Z (I/O8–I/O15)

Write

Active (ICC)

L

H

L

X

L

H

HI-Z (I/O0–I/O7);
Data In (I/O8–I/O15)

Write

Active (ICC)

 

Truth Table – CY62147G/CY62147GE

CE1#

CE2

WE#

OE#

BHE#

BLE#

Inputs/Outputs

Mode

Power

H

X

X

X

X

X

HI-Z

Deselect/Power-down

Standby (ISB)

X

L

X

X

X

X

HI-Z

Deselect/Power-down

Standby (ISB)

X

X

X

X

H

H

HI-Z

Deselect/Power-down

Standby (ISB)

L

H

H

L

L

L

Data Out (I/O0–I/O15)

Read

Active (ICC)

L

H

H

L

H

L

Data Out (I/O0–I/O7);
HI-Z (I/O8–I/O15)

Read

Active (ICC)

L

H

H

L

L

H

HI-Z (I/O0–I/O7);
Data Out (I/O8–I/O15)

Read

Active (ICC)

L

H

H

H

L

H

HI-Z

Output disabled

Active (ICC)

L

H

H

H

H

L

HI-Z

Output disabled

Active (ICC)

L

H

H

H

L

L

HI-Z

Output disabled

Active (ICC)

L

H

L

X

L

L

Data In (I/O0–I/O15)

Write

Active (ICC)

L

H

L

X

H

L

Data In (I/O0–I/O7);
HI-Z (I/O8–I/O15)

Write

Active (ICC)

L

H

L

X

L

H

HI-Z (I/O0–I/O7);
Data In (I/O8–I/O15)

Write

Active (ICC)

 

Note: The ‘X’ (Don’t care) state for the chip enables refers to the logic state (either HIGH or LOW). Intermediate voltage levels on these pins are not permitted.