Reading Status Register-1 on the S70FS01GS Flash Memory – KBA221813

Version 4

    Version: **

     

    Question:

    How can I read Status Register-1 on the S70FS01GS flash memory if my application doesn’t know the number of latency dummy cycles in advance?

     

    Answer:

    The S70FS01GS flash memory does not support the Read Status Register-1 (RDSR1: 05h) command because it is a dual-die device where every die set of registers must be addressed separately. The Read Any Register (RDAR: 65h) command must be used instead to read device registers. However, this command uses a predefined number of latency dummy cycles as shown in Figure 1:

     

    Figure1. Read Any Register Read Command Sequence

     

    The number of latency dummy cycles is defined in the Configuration Register-2 as shown in Table 1:

     

    Table 1: Configuration Register 2 Non-volatile (CR2NV)

     

    The number of latency dummy cycles for the RDAR command varies based on the used SPI frequency as detailed in Table 2:

     

    Table 2: Latency Code (Cycles) Versus Frequency

     

    Latency Code

    Read Command Maximum Frequency (MHz)

    RDAR (1-1-1)

    RDAR (4-4-4)

    Mode Cycles = 0

    0

    50

    1

    66

    2

    80

    3

    92

    4

    104

    5

    116

    6

    129

    7

    133

    8

    133

    9

    133

    10

    133

    11

    133

    12

    133

    13

    133

    14

    133

    15

    133

                                                                       
                          
    Configuration Register-2 must be read using the Read Any Register (RDAR: 65h) command. The factory default value of the Latency Code in CR2NV is 0, which means that 0 dummy cycles are needed by default. Thus, you can use a SPI frequency lower than 50 MHz to read the registers without any dummy cycles.
    In the other cases, unless you know the configured number of dummy cycles in advance, you will not be able to read any of the flash registers, including Status Register-1, which is essentially used during polling operations.
    To overcome this situation, perform the following sequence of actions:

    1. Use the WRAR command to write a well-known register value to CR2V (based on the used SPI frequency) and then use these latencies for any subsequent read operations that require dummy cycles.
    2. Restore the volatile version of the CR2 to the value it had before it was overwritten: Read CR2NV value and program it back to CR2V.

     

    Additionally, S70FS01GS has two separate set of registers for its two FS512S dies. Each set of registers needs to be accessed and configured separately. Address A26 = 0 selects the lower address FS512S die and A26 = 1 selects the higher address FS512S die.

     

    In other words, to access the registers on the lower FS512S die, use the address range: [0x00000000 … 0x00800040] and for the upper FS512S die registers, use the address range: [0x04000000 … 0x04800040].