Rad hardness, Soft Error Rate (SER), Single Event Upset (SEU) rates for the CY7B923 and CY7B933.

Question: What information do you have about rad hardness, Soft Error Rate (SER), Single Event Upset (SEU) rates for the CY7B923 and CY7B933?

 

Answer:

Cypress doesn't have any measurement data on radhard-ness of the parts. However, there are many factors that suggest that they are robust:
1) These devices are used in the International Space Station (see http://www.electronicstalk.com/news/cyp/cyp328)
2) The majority of the circuitry in the parts is bipolar, which is inherently rad hard
3) Because all storage elements in the device are flip-flops, and they are clocked continuously, each storage element is completely refreshed millions of times per second. This is different than a memory array where data gets written once, and may never be refreshed until it is overwritten perhaps hours later (or milliseconds later in the case of dynamic memories).
4) The process geometry used was 0.8 micron, and each flip-flop has an area much greateer than that of conventional memory cells.
5) The circuits used in many of the paths in this device are balanced constant-current, with current levels well beyond what could be realized or compromised by the decay of a single atom (and subsequent release of a single alpha or beta particle).
6) These parts are built on a BiCMOS process, but the majority of the circuitry in the parts is bipolar, which is inherently rad hard.
7) Empirical testing in the lab showed the parts to succesfully transfer 6.5e14 bits without error.