GPIF OUT Transactions Hanging Up on the FX2

Question: I am using endpoint 2 in AUTOOUT mode. I have seen the GPIF stop when the EP2CS register reports 0x48, that is full with four packets. I believe the endpoint is going full for some reason and disables the GPIF. I have not been able to find any reason. What am I missing?

 

Answer:

The following algorithm works well for GPIF FIFO write operations in auto mode:

if( GPIFTRIG & 0x80 ) // if GPIF interface IDLE
  if ( ! ( EP24FIFOFLGS & 0x02 ) ) // if there's a packet in the FIFO domain for EP2
  {
    if ( ext device not full )
    {
      SYNCDELAY;
      GPIFTCB1 = 0x01; // setup transaction count (256 wrds)
      SYNCDELAY;
      GPIFTCB0 = 0x00;
      SYNCDELAY;

      GPIFTRIG = GPIF_EP2; // launch GPIF FIFO WRITE
      SYNCDELAY;

      while( !( GPIFTRIG & 0x80 ) ) // poll GPIF Done bit
      {
        ;
      }
      SYNCDELAY;
    }
  }
}

In auto mode, the data packets get committed from the USB domain to the peripheral domain. Thus, the firmware does not need to check the endpoint status flags. Perhaps your transaction count is not setup properly, causing the GPIF to terminate before you expect it to.

The firmware merely detects if a packet exists for the GPIF to burst out, and then triggers the GPIF FIFO write transaction. This is a minimum requirement for the firmware. The CPU is not involved in committing the USB packet to the GPIF side. It is also uninvolved in detecting whether the host sent a USB packet to the FX2. These latter steps would have been required if the FX2 was in manual mode operation.