What is the impact of increasing the input clock frequency of the CY7C53150 to 20MHz to the external memory bus?

Question: What is the impact of increasing the input clock frequency of the CY7C53150 to 20MHz to the external memory bus?

 

Answer:

The AC characteristics of the external memory bus scale with the input clock frequency.  This will impact which memories can be used with higher clock frequencies.  As a general rule, the faster the input clock frequency to the Neuron, the shorter the Read Access Time and the Write Setup Time of the memory component need to be.  This will impact the CY7C53150 operating at 20MHz by limiting the selection of external memory components that can be used.  At this point only PROMs with Read Access times smaller than 50ns and SRAMs with Read Access times smaller than 50ns and Write Setup times smaller than 33ns, are compatible with a 20MHz CY7C53150.  No flash parts are compatible as the write setup time is too long.  Refer to the application note "CY7C53150 Neuron Chip External Memory Interface" for more detailed information.