Serial Programming PLL1 Frequency Changes In The CY22393/4/5

Question: How can I serially program frequency changes into PLL1 of the CY22393/4/5?

 

Answer:

PLL1 consists of eight table entries, [S2,S1,S0] = [000] through [S2,S1,S0] = [111]. The S2 pin is always available to be controlled externally, but the S1 and S0 pins are latched in at power up because they are used as the SDAT and SCLK pins during normal operation.

In order to serially program the accessible PLL1 table entries, the user needs to know what state the S1 and S0 pins are at power up and which register addresses these entries correspond to.

Below is a table of PLL1 entries and the register addresses that contain the configuration information.
[S2,S1,S0] = [000] registers 40H, 41H, 42H
[S2,S1,S0] = [001] registers 43H, 44H, 45H
[S2,S1,S0] = [010] registers 46H, 47H, 48H
[S2,S1,S0] = [011] registers 49H, 4AH, 4BH
[S2,S1,S0] = [100] registers 4CH, 4DH, 4EH
[S2,S1,S0] = [101] registers 4FH, 50H, 51H
[S2,S1,S0] = [110] registers 52H, 53H, 54H
[S2,S1,S0] = [111] registers 55H, 56H, 57H

Example 1:
If the S1 and S0 pins are pulled low during power up, the only table entries that can be accessed during operation are [S2,S1,S0] = [000] and [S2,S1,S0] = [100].

When S2 is pulled low, the user is accessing PLL1 entry [000]. In order to reconfigure the PLL1 frequency, the user will need to shift into registers 40H, 41H and 42H.

When S2 is pulled high, the user is accessing PLL1 entry [100]. In order to reconfigure the PLL1 frequency, the user will need to shift into registers 43H, 44H and 45H.

Example 2:
If the S1 and S0 pins are pulled high during power up, the only table entries that can be accessed during operation are [S2,S1,S0] = [011] and [S2,S1,S0] = [111].

When S2 is pulled low, the user is accessing PLL1 entry [011]. In order to reconfigure the PLL1 frequency, the user will need to shift into registers 49H, 4AH and 4BH.

When S2 is pulled high, the user is accessing PLL1 entry [111]. In order to reconfigure the PLL1 frequency, the user will need to shift into registers 55H, 56H and 57H.

Other combinations of latched S1 and S0 values can be accessed in a similar way as mentioned in the above 2 examples.

Note: It is recommended to either shutdown clock outputs, switch the outputs to the reference, or program the currently unused PLL1 table entry when serially programming the PLL. The outputs may display unusual behavior when the PLL's are being programmed since the configuration spans 3 bytes and can have illegal P and Q combinations before all 3 bytes are shifted in.