Clarification on FX2 FIFO Full Flag behavior on OUTs

Question: The FX2 is setup with a 512 byte, quad buffered, OUT endpoint. Would the FIFO full flags go active once a 512 byte packet is received from the host, or after 4 x 512 bytes are received from the host? An experiment with a double buffered (2x512) EP2 was done, where 2 one-byte packets were sent to it over USB. The full flag did not assert until the second byte had been placed into the second 512-byte buffer and passed to the slave side. Is this the correct behavior?

 

Answer:

In the scenario mentioned above with the 512 byte, quad buffered, OUT endpoint, the FIFO full flag would assert after 4 x 512 bytes have been received from the host, assuming the external master has not read any packets. The full flag is packet based, so if the host sent 4 x 1 bytes, this would also cause the full flag to be asserted.

Similarly, in the experiment with a 2x512 EP2, it is correct that the full flag did not assert until the second byte was placed in the second 512-byte buffer and passed to the slave side.