The easiest way to clear the buffers is with a FIFORESET. You might want your application software to send a vendor command that you implement in firmware to reset and then re-arm the buffers. In order to reset an endpoint FIFO, write 0x80 to this register to NAK all transfers from the host, then write the endpoint number to this register (0x02, 0x04, 0x06, or 0x08) to reset an individual FIFO (i.e., to restore endpoint FIFO flags and byte counts to their default states). Then write 0x00 to clear the NAKALL bit and restore normal operation. Refer to section 5.5.4 (FIFO reset) of the Technical Reference Manual for further information on this register usage.
You also need to ensure after performing a FIFORESET that you are re-arming the OUT endpoints. For OUT endpoints, you need to arm the buffers to let the SIE take control of them, and accept data from the host.