Multiple Interruption Detection (PSoC1)

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    Question: How to detect multiple GPIO interrupts in PSoC1?



    One method is to set all three pins to use the GPIO interrupt. There is only one Interrupt Service Routine for the GPIO interrupt, so the pin status need to be compared with the previous state updated on every occurrence of GPIO interrupt. Care must be taken that all GPIOs are configured either as Rising Edge or Falling edge, there should not be a mix of Rising edge and Falling edge interrupts. If application demands for some GPIOs to have Rising Edge and some to have Falling edge then all must be configured as "Change From Read".

    Another solution is to use the GPIO interrupt for one pin and two DigBuf User Modules for the other two inputs. Each User Module has its own ISR so, the input is automatically determined depending on which ISR is entered. Similarly, a CMPPRG Programmable Threshold Comparator can be used to generate an interrupt on one of the comparator buses. Again, each comparator bus has its own ISR.

    Finally, a combination of any of the three methods above can be used if digital or analog resources are constrained.