As the PSoC does not have a hardware interface to an external RAM, it has to be done in firmware by using bit-banging. Code should be written to generate the Address / Data bus and control lines like CS, RD and WR by writing to the PRTxDR registers. As every read and write operation is executed by a few lines of code, the read and write will be slower than a hardware controlled read and write. This may lead to speed constraints which reduce the throughput.
External RAM's with I2C or SPI are available. Using SPI or I2C user modules, PSoC can be interfaced to external memory.