Do I need to use the CPLD on my design for the CY4640?


Question:Do I need to use the CPLD on my design for the CY4640?

Response:No, the CPLD is used for configuring our hardware platform. Because of the flexibility of the RDK and the design requirements the CPLD is used for preconfiguring the board and parts. For example, the CPLD reads the dip switch settings to determine which bootstrap mode to configure the EZ-Host part as. Included in the CY4640 RDK is a Hardware directory. In this hardware directory you will find the CY4640 design files. One of the files is a Simplified Mass Storage Schematic, which has the CPLD removed. Note that this simplified design has only been done on paper and never been built by Cypress so while we have very high confidence in the design we have not built and tested it. Note the jumper going to the EEPROM, which is used to simplify re-programming a already programmed EEPROM. OrCAD design files (.dsn) are included in the hardware directory to simplify your design by having to start from scratch. A good resource when designing your board is the CY4640 Hardware reference manual and OTG-Host Hardware design notes (found in the Docs directory).

Related Documents:
CY3663 - EZ-OTG / EZ-Host Development Kit