- What is the advantage of FWFT mode?
- How does the AE# flag work in FWFT mode (vs. CY Standard mode)?
In the CY Standard Mode, each read operation performed on the FIFO retrieves the next piece of data to the FIFO output data bus. Thus, the first read operation performed on the FIFO retrieves the first word onto the FIFO output data bus. The device reading from the FIFO will latch the first piece of data on the second rising edge of the clock, which may also be the second read operation of the FIFO. The FWFT Mode, however, allows the first piece of data to be at the output data bus before a read operation is performed, thus the first actual read operation actually retrieves the second piece of data from the FIFO. Such an arrangement allows the device reading from the FIFO to latch the first piece of data at the first read operation.
Therefore, for CY Standard Mode, if the FIFO contains N words, ENB will need to be asserted for the duration of N CLKB rising edges, while N+1 CLKB rising edges will be required for the device reading from the FIFO to read all N words. For the FWFT mode, only N CLKB rising edges are required to read all N words (ENB needs to be asserted for the same duration of N CLKB edges). FWFT Mode is required for cascading 2 or more FIFOs, but can also be used in stand-alone mode. In FWFT mode, the very first word written into the empty FIFO is not stored in the memory array and so it is not counted. As soon as the OR flag goes HIGH, that first word is shifted to the output register. So if you set AE# to 8 in one of the 5V x36 FIFOs (CY7C436xx), because of the inherent uncertainty, it will remain asserted until EITHER X+1 or X+2 (9 or 10) words are actually in the FIFO array. Because the first data written is not stored in the FIFO array, that means you will have to actually write 10 or 11 words into the FIFO before AE# goes high.
The table on all of the CY7C436xx datasheets is confusing because it does not explain the difference between assertion and de-assertion of the AE# flag. The table is true the way it is shown for after leaving the Almost Empty state (so you have > 10 words in the memory, effectively > 11 writes). Then, when you read from the FIFO and cross the border between 9 to 8 words in the FIFO memory, the AE# flag will assert. It is also confusing because they tried to group both CY mode and FWFT mode together in that table. The problem is that in FWFT mode, as soon as OR is asserted, the first data is driven, and OR is de-asserted again. You will see that in the regular CY mode, EF# goes high 3 cycles after the first word is written. It remains high until the first read operation (when enabled and read strobed). This could be several clock cycles later. In contrast, in FWFT mode, OR goes high at the same time the first word is driven (when enabled), and returns low at the very next clock edge.