Function of the PMU

Question: What is the function of the PMU?

 

Answer:

The PMU contains a linear low-drop-out regulator that is tied directly to the VBAT (battery) pins. This regulator supplies the voltage to the digital logic when VBAT is in the range of 1.9V to 3.6V and will gracefully transition to tracking VBAT when below 1.9V (i.e., the digital logic voltage will droop down to as low as 1.7V when VBAT is at 1.8V). The regulator will transition to sleep mode with a controlled rise time up to the external VBAT voltage. It will also transition back to the regulated voltage with a similarly controlled fall time.

  PMU rundown (When PMU EN=1):

     
  •   
        When PMU OUTV=00: PMU output equals the battery voltage from 2.7V to 3.6V but holds the output at 2.7V minimum for battery voltages from 1.8V to 2.7V via an active inductor-diode charge pump circuit connected to the L/D pin.
     
  •  
  •   
        When PMU OUTV=01: PMU output equals the battery voltage from 2.6V to 3.6V but holds the output at 2.6V minimum for battery voltages from 1.8V to 2.6V via an active inductor-diode charge pump circuit connected to the L/D pin.
     
  •  
  •   
        When PMU OUTV=10: PMU output equals the battery voltage from 2.5V to 3.6V but holds the output at 2.5V minimum for battery voltages from 1.8V to 2.5V via an active inductor-diode charge pump circuit connected to the L/D pin.
     
  •  
  •   
        When PMU OUTV=11: PMU output equals the battery voltage from 2.4V to 3.6V but holds the output at 2.4V minimum for battery voltages from 1.8V to 2.4V via an active inductor-diode charge pump circuit connected to the L/D pin.
     

  PMU rundown (When PMU EN=0):

     
  •   
        PMU can be disabled (thru SPI write) to allow direct drive from an external 2.4V to 3.6V voltage source (i.e., USB connection thru a linear 3.3V regulator). For more details, please see PWR_CTRL_ADR bit 7 (PMU Enable) descriptions in the datasheet.
     
  •  
  •   
        PMU can be disabled (thru SPI write) to allow an external boost voltage regulator to take over control of the VREG voltage. For more details, please see PWR_CTRL_ADR bit 7 (PMU Enable) descriptions in the datasheet.