A 20MB-30MB/s data transfer rate is a reasonable expectation considering the SX2 interface can run up to 48 MHz. To attain these types of transfer rates for the system, an ideal configuration would be to operate the FIFOs in synchronous mode at 48 MHz, and perform wordwide data transfers. Even if the external master clocks in a word every other IFCLK, this results in a net 48MB/s burst rate. Ideally, SX2 would also be configured to use two endpoints (IN and OUT) that are both 4x buffered. Additional buffering makes it easier to sustain the required data transfer rates.