CS# is an alternate function of FLAGD pin in SX2. Bit 1(FLAGD/CS#) of the IFCONFIG register controls the function of the FLAGD/CS# pin. When FLAGD/CS# = 0 (default), the pin operates as a slave chip select (CS#). If FLAGD/CS# = 1, the pin operates as FLAGD. If this bit is set to 0(CS# mode) and CS# is de-asserted, the SX2 will ignore all Slave FIFO control signals (SLWR, SLRD/SLOE, PKTEND) and tri-state the data bus. Only the local bus is affected. SLCS can be tied to low all the time if FIFO data bus is not shared with any other external peripheral is not needed.