In ISSP mode, PSoC drives the SDATA line to resistive low corresponding to a '0'. A pull up resistance on the SDA line used for I2C communication will combine with this pull down resistance and form a potential divider. Because of this, the voltage at the SDATA pin when the PSoC drives the pin Low (when the Programmer is reading the Device ID, Verification etc), will be above the VIL threshold of the programmer. This will cause read errors because of which the programming will not be successful. The best solution to this problem is to use P1 and P1 as I2C pins.
If using P1.5 and P1.7 is not an option, here are a few work arounds.
- Connect the pull-up resistor of the I2C data line to an extra pin on the PSoC. Configure this pin as Strong and write a 1 to this pin when the program is running. This will produce a VDD for the pullup resistor. When the PSoC is in reset, this pin is High Z, so the pull up resistor will be floating and will not interfere with the programming operation.
- Provide a jumper on the Pull up resistor to the SDA line so that it may be disabled while programming.
- Connect a pull down resistance on the ISSP SDATA line while programming. Value of resistance depends upon the pull up resistance value on these lines. Consider that internal pull down resistance value is 5.6K ohm. Now calculate the resistance value such that line is driven below 0.8V corresponding to low logic, after connecting the resistance.