Sigma Delta ADC and Decimator Bit Discrepancy
Anonymous
Not applicable
Dec 19, 2008
12:00 AM
- Subscribe to RSS Feed
- Mark as New
- Mark as Read
- Bookmark
- Subscribe
- Printer Friendly Page
- Report Inappropriate Content
Dec 19, 2008
12:00 AM
Answer:
Question: Why is the Sigma Delta ADC only 13-bit when the decimator is 16 bits?
Response: A Sigma Delta ADC can only utilize 14-bits of the decimators 16-bit math. The remaining 2-bits are noise. This condition is only true when using the DelSig in the CY8C29x66 and when using both the double modulator and 8-bit incremental. You can also achieve 14-bits by using a DesSig11 and left-justifying the "data position" in the user module parameters. Refer Application note AN2239 - ADC Selection
Labels
Rate this article:
Contributors
-
This widget could not be displayed.Anonymous