USB 2.0 PCB layout recommendations (as a starting point):
- Four-layer, impedance controlled boards are required.
- Impedance targets must be specified (ask your board vendor what they can achieve).
- Do not cross plane splits.
- Minimize vias.
- Maximize distance to other traces.
- Control trace widths to obtain target impedance.
- Maintain strict trace spacing control.
- Minimize stubs.
- Common mode chokes (two-wire, @100MHz should be < 300 ohms, differential impedance @100MHz should be < 8 ohms) are a USB 2.0 EMI solution.
- Refer to the USB 2.0 design guideline for solutions that work for USB2.0 FS & HS signal quality requirements.
- Proper grounding of chassis is crucial.
- Connector shell must connect to green wire ground early and well.
- Short D+/D- traces from connector to silicon.
- I/O shield must connect securely to chassis and receptacle.
- Bypass/flyback caps on VBus near connector (ESD strikes, "helper").
- Chapter 7 of USB 2.0 spec. -> www.usb.org
We would recommend reading several design guidelines one is located at:http://www.cypress.com/?rID=12719
In addition, we would recommend reading the design guidelines document by USB-IF . You can find the USB-IF document here.