Related and Unrelated Frequency Outputs:
Related clock output frequency means clock frequency which is integer multiple of reference clock frequency where unrelated frequency is any frequency which is not integer multiple of reference frequency.
Two unrelated frequency outputs cannot be generated using one PLL, it requires two different PLL. CY254xx family has part with maximum four PLLs on chip. All of these PLLs can be programmed independently to generate four unrelated frequency outputs. Out of four PLLs only two PLLs supports spread spectrum, this results in only two unrelated output frequency with spread.
CY254xx Family includes following part numbers:
Each of these parts has different numbers of PLLs; it is mentioned in relevant part datasheet.
This concept is limited to clock products which have only integer divider and does not have float divider.