Cypress offers the following suggestions based on the matching network layout to optimize RF board performance:
- Limit the number of signal vias in the matching network path, because they add unaccounted inductance to the circuit.
- In contrast, use a large number of vias to tie the front and backside ground plane regions together, especially along the antenna trace.
- Do not place the crystal under the matching network – antenna section. This could contribute to unnecessary sideband noise.
- Ensure that there are no isolated GND islands for the components that connect to ground.
- Orient the chip in the layout such that the RF input/output pins are closest to the antenna. Running longer traces affect the impedance of the network.
- Use the shortest path traces between components in the matching network.
- Sharp bends in traces must be avoided. If the component placement necessitates a bend, two 45 degree bends are better than a 90 degree bend.