Kelvin sense lines should connect directly to the sense resistor terminals. The traces should be symmetrical and have the same length and thickness.
In Figures 1 and 2, points A and B are the Rsense pads and points C and D are the input pins to the current sensing amplifier, CSPx (+ve) and CSNx (-ve) respectively.
Figure 1 shows a correct design.The sense lines are connected to the inner edges of the Rsense pads. Also, traces A-C and B-D are symmetrical with the same length and thickness This ensures that the voltage across Rsense is the same as the difference between. CSPx and CSNx.
Figure 1: Correct Design
Figure 2 shows an incorrect design. If you tried to maintain 100mV across the sense lines, the actual voltage across Rsense would be less than 100 mV due to the voltage drop across A-X and B-Y. The measured current would be less than actual.
Figure 2: Incorrect Design
For further information refer to PowerPSoC(R) – Hardware Design Guidelines.