Using a single-ended reference input with CY2Dx15xx high performance buffer devices

Version 2

    Translation - Japanese: CY2Dx15xx高性能バッファデバイスでのシングルエンドリファレンス入力の使用 - Community Translated (JA)


    Question: Can the CY2Dx15xx family of high performance buffer devices accept a single-ended reference input by terminating the IN# pin?



    The CY2Dx15xx family of devices was designed to accept differential input reference clocks-- LVPECL, LVDS, or CML type inputs, depending on the device. Device datasheet specifications depend on the use of a differential input meeting requirements defined in the datasheet. The CY2CP1504 was designed to accept single-ended LVCMOS inputs and is recommended in applications requiring fanout of an LVCMOS clock signal to LVPECL outputs.

    In order to use one of the CY2Dx15xx devices with a single-ended reference input, a special termination network may be required, and some datasheet specs may not be guaranteed under all conditions. In such cases, please consult the factory to receive support from a Cypress product line applications engineer.