KEIL Compiler provides APIs (defined in cymem.a51) to access registers that take care of byte swapping. These APIs must be used to access 8, 16 and 32-bit registers in PSoC3 device.
APIs for accessing registers mapped in the first 64Kbytes of XDATA space
- CY_SET_REG8(addr, value)
- CY_SET_REG16(addr, value)
- CY_SET_REG24(addr, value)
- CY_SET_REG32(addr, value)
APIs for accessing registers mapped above the first 64K of XDATA space.
- CY_SET_XTND_REG8(addr, value)
- CY_SET_XTND_REG16(addr, value)
- CY_SET_XTND_REG24(addr, value)
- CY_SET_XTND_REG32(addr, value)
When the source and destination data organized in different endian-ness, the DMA transaction descriptor can be programmed to have the bytes endian swapped while in transit.
The SWAP_EN bit of the PHUB.TDMEM[0..127].ORIG_TD0 register specifies whether an endian swap should occur. If SWAP_EN is 1 then an endian swap will occur and the size of the swap is determined by the SWAP_SIZE bit of PHUB.TDMEM[0..127].ORIG_TD0 register.
- If SWAP_SIZE = 0 then the swap size is 2 bytes, meaning that every 2 bytes are endian swapped during the DMA transfer. The code snippet of TD configuration API to enable byte swapping for 2bytes data is given below.
CyDmaTdSetConfiguration(myTd, 2, myTd, TD_TERMOUT0_EN | TD_SWAP_EN);
- If SWAP_SIZE = 1 then the swap size is 4 bytes, meaning that every 4 bytes are endian swapped during the DMA transfer. The code snippet of TD configuration API to enable byte swapping for 4bytes data is given below.
CyDmaTdSetConfiguration(myTd, 4, myTd, TD_TERMOUT0_EN | TD_SWAP_EN | TD_SWAP_SIZE4);
Note: PSoC 5 compiler uses little endian unlike PSoC 3 KEIL Compiler. Hence the DMA byte swapping must be disabled when the code is ported to PSoC 5 device.
Refer to DMA component datasheet and PSoC 3/5 Technical Reference manual for more details on DMA operation and usage.