High Resolution DAC in PSoC 3/5

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    Question: I would like to create a 12 bit DAC in PSoC 3/5.  But PSoC 3/5 only has 8 bit IDAC and VDAC.  How do I implement a higher resolution DAC in PSoC 3/5?

     

    Answer:

    PSoC 3 has 8 bit voltage and current DACs.  Higher resolution DACs may be created by combining two 8 bit DACs, one for MSB and one for LSB and summing their outputs together.  The DAC section of the TRM shows how to chain two 8 bit DACs to get a 12 bit DAC.

    The MSB is implemented using an 8 bit DAC configured for 2.040mA full scale.  Each bit of the MSB DAC now corresponds to 8uA.  To create a 12 bit DAC, we need to extend the resolution by four bits and each bit should be equal to 1/16 of the MSB DAC, which is 0.5uA.   This can be implemented by using Bits 2 to 5 of another 8 bit DAC configured for a 32uA output.  The schematic diagram of a PSoC3 project to create a high resolution current DAC is shown below.

    Below is the code that is used to split the 12 bit DAC value and update the MSB and LSB DACs.

    DAC_MSB_SetRange(DAC_MSB_RANGE_2mA);
    DAC_LSB_SetRange(DAC_LSB_RANGE_32uA);
    DAC_MSB_Start();
    DAC_LSB_Start);
    DacValue = 4095;
    DAC_MSB_SetValue((DacValue >> 4) & 0xFF);
    DAC_LSB_SetValue((DacValue << 2) & 0x3C);


    To implement a 10 bit DAC, the code would be:

    DAC_MSB_SetRange(DAC_MSB_RANGE_2mA);
    DAC_LSB_SetRange(DAC_LSB_RANGE_32uA);
    DAC_MSB_Start();
    DAC_LSB_Start);
    DacValue = 1023;
    DAC_MSB_SetValue((DacValue >> 2) & 0xFF);
    DAC_LSB_SetValue((DacValue << 4) & 0x30);


    But this method also has its disadvantages.  Any mismatch in gain between the MSB and LSB DACs will result in non-linearity and unequal step sizes.  This can be compensated by calibration, either by trimming the DAC using the DACx_TR register or by using the unused least significant bits of the LSB DAC.
     

    Please refer to the Application Note "AN64275 - PSoC® 3 and PSoC 5 - Getting More Resolution From PSoC DACs" for more methods.