Glitch on Power Supply Line During RECALL- KBA83044

[GirijaC]

Version: **

Translation - Japanese:  RECALL中の電源ラインのグリッチ - KBA83044 - Community Translated (JA)

Question:

How does the Power-up RECALL operation work when V_CC is non-monotonic during power up?

Answer:

During power up, when V_CC crosses V_SWITCH level, a RECALL operation is initiated. If power glitches below V_SWITCH before the completion of RECALL, then the RECALL operation will try to complete the operation until it finishes or runs out of energy. In either case, a reset will occur at the end of this first recall. When V_CC crosses the V_SWITCH level a second time, the RECALL operation is again initiated. This cycle can be repeated over and over again if there are multiple power glitches. A successful RECALL is completed only at the end of the last glitch, when V_CC remains above the V_SWITCH level for the t_HRECALL duration. Note that the NV data is not affected during RECALL and that the SRAM will always have the recalled data after completion of final the RECALL operation. (See nvSRAM datasheets for the V_SWITCH and t_HRECALL parameters. For example, V_SWITCH is 2.65 V and t_HRECALL is 20 ms for the 4-Mb nvSRAM, CY14B104LA).

Note that V_CC glitches causing multiple recall cycles at power-up delay the completion of the nvSRAM boot up. Therefore, it is recommended that the V_CC is monotonic during power-up.