Translation - Japanese: RECALL中の電源ラインのグリッチ - KBA83044 - Community Translated (JA)
How does the Power-up RECALL operation work when VCC is non-monotonic during power up?
During power up, when VCC crosses VSWITCH level, a RECALL operation is initiated. If power glitches below VSWITCH before the completion of RECALL, then the RECALL operation will try to complete the operation until it finishes or runs out of energy. In either case, a reset will occur at the end of this first recall. When VCC crosses the VSWITCH level a second time, the RECALL operation is again initiated. This cycle can be repeated over and over again if there are multiple power glitches. A successful RECALL is completed only at the end of the last glitch, when VCC remains above the VSWITCH level for the tHRECALL duration. Note that the NV data is not affected during RECALL and that the SRAM will always have the recalled data after completion of final the RECALL operation. (See nvSRAM datasheets for the VSWITCH and tHRECALL parameters. For example, VSWITCH is 2.65 V and tHRECALL is 20 ms for the 4-Mb nvSRAM, CY14B104LA).
Note that VCC glitches causing multiple recall cycles at power-up delay the completion of the nvSRAM boot up. Therefore, it is recommended that the VCC is monotonic during power-up.