Mailbox memory location arbitration for dual port RAMs

Question: How is simultaneous access of the mailbox locations handled?   What happens if I read and write from the same mailbox at the same time?



The upper two memory locations are special locations used for message passing. When both ports try to access these locations at the same time, arbitration logic will declare a winner and a loser. It does not matter if one port reads, one port writes or both ports write. The winner of the arbitration can always operate correctly. If the losing port is reading, it will be allowed to read from the mailbox, but it will receive a BUSY signal to warn the processor that it may be reading invalid data. The processor should re-read the mailbox after the BUSY signal is disabled. If the losing port is writing, it will receive a BUSY signal and its write operation is inhibited.