Drive Mode for Unused GPIO pins and EMC consideration

Question: Which drive mode is preferable for unused GPIOs for least power consumption and better EMI performance?



By default GPIOs are in High Z Analog mode and we recommend to keep it in same mode if not used. Only leakage current will be drawn from GPIO in this case.

Alternately, the GPIOs can also be configured as Strong mode, in which case a zero should be written to the corresponding PRTxDR register bit.  Setting unused outputs to strong digital output, with logic state zero helps in reducing EMI. For more details on EMI design considerations for PSoC, please refer application note AN2155 EMI Design Considerations for PSoC. To know how to control GPIOs in C, you can read this following article.