EZI2C user module supports 7 bit addressing format which can range from 0 to 127 (Decimal) only if the RAM registers option is selected. If the ROM registers are enabled, the valid I2C address range gets limited 0 – 63 (Decimal). Because if ROM registers are enabled, the EzI2Cs slave now has two addresses, one for RAM registers and one for ROM registers. The MSB of the 7 bit address is now used to differentiate between ROM and RAM buffers. For example, if the address of the EzI2Cs is set to 0x07 and ROM buffer is enabled, then an I2C Master can access the RAM registers by using address 0x07 and ROM registers by using 0x47. Hence, enabling ROM Registers limits the address declaration from 0 to 63 (Decimal).
If the application requires ROM registers as well then we suggest you to use I2CHW user module.