Translation - Japanese: GPIFとスレーブFIFOモード間の選択 - Community Translated (JA)
What are the advantages/disadvantages of either the GPIF mode or slave FIFO mode in the CY7C68013A? Which one is the better choice?
The choice between GPIF and Slave FIFO really depends on the nature of the application. The GPIF is most often used in applications where the outside device is a slave device, such as an external FIFO, SRAM, HPI port. It really fits well in an application where it is the source of the stimulus, and thus, all of the prior knowledge of how much data to transfer lies in the FX2. The external peripheral wired to the FX2 operates as a slave device mastered by the GPIF.
In a system where the FX2 is purely a high-speed data pipe, Slave FIFO mode is much more appropriate. The interface is streamlined between the outside master and the FX2, and really, in larger systems where there is already an FPGA or external microcontroller, the Slave FIFO mode makes most sense. Using the Slave FIFO mode also cuts down on the learning curve required in understanding how to use the GPIF. When FX2 operates in slave FIFO mode, the external peripheral wired to the FX2 is the master to the FX2LP FIFOs.
From a performance perspective, the firmware (8051) is still responsible for launching GPIF applications, so one might incur some firmware overhead if data transfers are being handled in both directions. In Slave FIFO mode, with AUTOOUT/AUTOIN=1, the external master can directly transfer data through the Slave FIFO interface. The greatest throughput can be achieved when using Slave FIFO synchronous timing.