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FX2 USB Interrupt Priority

FX2 USB Interrupt Priority

Anonymous
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Question: Timer period is affected when USB traffic happens? Why is thi sproblem occuring since the TRM states that timer 1 interrupts have priority over USB interrupts?

 

Answer:

The timer period is affected because the timer 1 interrupt is not able to interrupt the USB interrupt without changing the timer 1 interrupt priority to high. Ensure that the timer 1 priority is set to high (PT1 = 1). The key is in the following text in section "4.3.1.1 Interrupt Priorities" of the FX2 TRM:

"Once an interrupt is being serviced, only an interrupt of higher assigned priority level can interrupt the service routine. That is, an ISR for a low-assigned-level interrupt can only be interrupted by a high-assigned-level interrupt. An ISR for a high-assigned-level interrupt can only be interrupted by the RESUME interrupt."

The key phrase is really "assigned priority level". So in order for the timer 1 interrupt to interrupt the USB interrupt, you need to change the timer 1 interrupt priority to high, and the USB interrupt to low. The natural priority does not apply here. So if both priorities were low, even though timer 1 has a higher natural priority, it is not allowed to interrupt the USB interrupt.

Also consider using polling for handling USB transfers instead of USB interrupts. Using polling is typically more efficient for processing endpoint data.

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