The moment the first byte/word is written in the FIFO, the EMPTY flag will disappear. When empty flag is asserted, usually, you do not move to the next state asserting the SLRD and SLOE. You need to remain in the same state. When FIFO is not Empty as indicated by the Empty Flag, you will transit to the next state. If FIFO is Empty and the data if at all is read then it will not be a valid data.
The external master needs handshaking signals to manage under-flow or over-flow conditions. Typically an external master will look at the FIFO empty flag when reading data from FX2LP to decide when to start reading and will look at the FIFO full flag when writing data into FX2LP to decide when to stop writing. So you should not Read from an Empty FIFO and write to a FULL FIFO.