Using GPIF pins ( RDY / CTL pins) for GPIO functionality in FX1 / FX2 / FX2LP
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Answer:
Once the part is set to operate in GPIF mode (IFCONFIG[1:0] set to 10b) the 8051 can determine the current status of the RDYx inputs by reading GPIFREADYSTAT register. The GPIFIDLECTL register sets the CTLx output to be in specific state. So, the 8051 can use this register to output values on
the CTLx output lines when the GPIF is in IDLE state and use teh GPIFREADYSTAT regsiter read the inputs on RDYx input pins.
So, yes the GPIF CTLx/RDYx can be used as general purpose input and output pins using the GPIFREADYSTAT and GPIFIDLECTL respectively. Be informed that CTLx signals will obviously be affected once a waveform (GPIF transfer) is triggered. Otherwise, if the GPIF is IDLE, the mentioned GPIF registers can be used to read/output values on RDYx/CTLx pins.
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