Signal overshoot and undershoot definitely play a large factor in signal integrity. With memory devices, like FIFOs, this is important because it can cause memory corruption. Memory arrays are some of the most sensitive devices in common usage. With a high-speed memory array, undershoot on input signals is very likely to cause data loss at random times with false read/write triggers. This is why when designing a circuit board, a good termination scheme is needed to maintain signal integrity. If you are seeing duplicate data (reading the same word twice), this can be caused by overshoot or undershoot on the read enable signal. If you are getting data when you do not want it (getting two words instead of one), this can be caused by overshoot or undershoot on the write enable signal. Both of these errors can be verified by viewing the control signals through an oscilloscope. In general, it is important to ensure that all inputs into the FIFO as well as the power supply are clean and terminated correctly.