The ISD-300A1 was designed to the ATA-5 specificiation, which says, "Hosts that do not support Ultra DMA modes greater than mode 2 shall not connect to the PDIAG-:CBLID- signal". The schematics contained in the hardware directory of the reference design kit CD show PDIAG is not connected.
The ISD-300A1 gathers information from the connected device through an identify device command to determine the maximum speed it will support. It then determines the maximum speed to communicate by taking the maximum speed that both the device supports and the speed that the ISD300A1 is programmed to run. This all takes place during the initialization when powered up.
A host can poll CBLID to determine if an 80- or 40-pin cable is being used. If a 40-pin cable is being used, it will run at a maximum of UDMA Mode 2. The ISD-300A1's maximum supported speed can be programmed into the configuration data in the EEPROM. For more information on programming the EEPROM refer to the reference design kit CD.
Please note that the ISD-300A1 is obsolete and the functional replacement is AT2LP. All the related collaterals of AT2LP can be found in the link here