1. Some FIFOs have an Output Enable (OE#) signal associated with the reading port. This control signal is provided to three-state the data bus regardless of what else is occuring in the FIFO. More specifically, when OE# is enabled (low), data in the output register will be available on the data bus. When OE# is disabled (high), the FIFO's outputs are forced to a High-Z (high impedance) state.
2. OE# is an asynchronous signal which means it is not tied to a clock. The FIFO will react to the state of the OE# signal asynchronously. This means that even if there is a valid read operation on the reading port, if OE# is high, no data will come out. However, the read operation does occur. That means the next read operation will actually point to the next word in the FIFO.
3. When OE# is not asserted, all data outputs still remain in a high-impedence state, even when RS# is asserted. All data outputs go LOW after the falling edge of RS only if OE is asserted.
4. If the FIFO outputs are not connected to a bidirectional bus, it will be fine to have the OE# pin asserted at all times (tied to ground) since this pin only controls the tristate buffer at the outputs.