IntReady signal of GPIF in FX1/FX2/FX2LP

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    Question: What does IntReady mean? How does the GPIF state machine use it?



    This bit is basically an "Internal READY" bit that functions as a seventh RDY input, controlled by the firmware instead of a hardware pin. The 8051 can set this bit to a specific state and use this as one of the "already defined" inputs in the Decision Point (DP). This is just a way to define a fixed, static, predefined, 8051 control input signal.

    This is used in as one of the input signals in a DP.  The advantage of this input is that the designer of the waveform already knows its state and can use the known state to define a logic function with an unknown dynamic input (RDY input) from the external peripheral.