Question: While debugging my project in PSoC Designer, the program sometimes halts at the "halt" instruction at ORG 04h in boot.asm. What could be the reason for this? I am using PSoC 1.
Answer: This problem could occur under one or a combination of the following conditions.
- The LVD interrupt is enabled in the project.
- No LVD ISR has been written
- The board is being supplied with external power and the power supply has dropped below LVD trip point.
If the debugging pod is being powered by the board, check if the board power supply is stable and above LVD trip point. If not, in the Project >> Settings >> Debugger tab, select "OK for ICE to Power Pod" and power the board through the ICE.
If you intend to process the LVD interrupt and perform some operations on a brown out condition, write an ISR for the LVD and repalce the default "halt" instruction in the LVD interrupt vector with an ljmp to the LVD ISR.
