At power on or after a pin reset, the BIOS checks the value of GPIO31:30 to determine what mode to operate in. For stand-alone mode, both of these pins must be pulled high. If these pins are not both high, the BIOS will configure the part to operate in one of the three different co-processor modes. If while the BIOS is loading firmware, the part is reset and at that time the EEPROM is driving the SDA line low, the BIOS will see that the part is configured to be in co-processor mode instead of in stand-alone mode. This will cause the EZ-Host/OTG part to configure the hardware to be in co-processor mode and thus will not try to load firmware from the EEPROM. This will persist until power is removed from the EEPROM because the EEPROM will be waiting for the next clock.