EZ HOST function when connected to SRAM

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    Question: Can the EZ HOST function correctly if it is connected to the SRAM through the CPLD (e.g. during booting, reading, and writing)?



    During initialization, the BIOS reads external memory locations to determine if there is any external memory and what width the memory is (8 or 16 bit). It then configures the External Memory Control Register appropriately. Of course you can add to your code or in the scan record to force this to be correct. If the EZ-Host had access to RAM through the CPLD by default and the delay was such that no timing violations occurred, then this initialization should work correctly. By default, the BIOS is conservative and starts with 5 wait states for external memory accesses.