During operation, one can use the operation registers (addresses 0x04A0-0x04A8) to read and write values to the SEEPROM. If you can read and write to those register locations, then the EEPROM is correctly connected to the PCI-DP. If the operations register cannot find the EEPROM, ensure that the EEPROM is strapped as addressed 0x0 and that it is not locked in write prohibited mode. Some EEPROMs require an unlock command before you can write data to it. You have to check the datasheet for the EEPROM to check this.
If there are any problems, the first thing to check is that the EEPROM is compatible to the PCI-DP. For example, the device type identifier should begin with 1010 and it should be comparable in operation to the Xicor X24C02 or Microchip 24LC02 EEPROMs. Using a larger 1K x 8 EEPROM (i.e. Microchip 24LC64) will also cause some problems. In the smaller device, addressing is only a single 8-bit address rather than the "high byte" and "low byte" of the larger 1K x 8 EEPROM. As such, if you compare how reading and writing is done in the two devices, you will see that in the smaller EEPROM, there is a start bit, then a single control byte, a single address byte, followed by a single data byte, and finally a stop bit. In the larger EEPROM, there is a start bit, a control byte, then two address bytes, followed by the data byte and stop bit. So the problem is that a larger EEPROM is looking for a second address byte.
The boot EEPROM for the PCI-DP only requires 120 entries total. There is no need for a 1K deep EEPROM.