Accessing Operations Registers and Shared Memory

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    Question: - Are there any timing differences between the register access and shared-memory access?  - Do the same rules apply for reading and writing to the operations registers versus the shared memory?




    The memory within the PCI-DP is divided into different sections as shown in the datasheet. The architecture of all of these sections, however, is the same. That means that the timing rules for accessing either the shared memory or the operations registers (either read or write) will be the same. The only difference is the address you are writing to.