Waking up CY8C20xx6 using the I2C hardware address

Question: How EzI2C UM (user module in PD5SP6 or earlier) can be modified so that the device (PSoC - CY8C20xx6) can be woken up from sleep by sending a targeted I2C read instruction from the master side.



Step1: Configure I2C block to work in sleep mode (SLP_CFG2 |= 0x02)

Step2: Enable I2C block interrupt (INT_MSK0 | = 0x80)

Step3: Enable I2C hardware address matching feature, this is done by replacing assembly instruction "mov reg[I2C_XCFG], 0" with "mov reg[I2C_XCFG], 0x01" in EzI2Cs_Start() API. API can be found in EzI2Cs.asm file.

Step4: Set I2C hardware address in register I2C_ADDR. Set address should be same as the "Slave_Addr" parameter of EzI2C UM

Note: Above modifications are to be made on top of a working EzI2C UM configuration/code in PD5 SP6 (or earlier). Step3 can be skipped if “EzI2Cs.asm” template file residing in the location “C:\Program Files\Cypress\Common\CypressSemiDeviceEditor\Data\CY8C20060\EzI2Cs” is replaced with the one attached with this KB article (before replacing make sure that PSoC designer version is of PD5SP6 if not follow Step3 above)

Sleep Entry/Exit:

Following procedure need to be followed every time for putting /waking-up device to/from sleep,

Step1:  Call M8C_Sleep Macro; Device entry to sleep should be directly under the control of I2C Master.  

Step2:  Master can wake-up the device from sleep by sending a read instruction targeted to the device.

Step3:  Data contained in the above wake-up I2C read instruction should be discarded by I2C master.