Being a 6-bit SAR, the input should be stable for six times the ADC performs the algorithm of "guessing" the input value using the references. So, the conversion time or the time the data should be stable for the ADC to convert the input to digital code is six times the period of the sample clock (Φ1/Φ2) . The sample clock here, is one fourth of the analog column clock. The 25us given in the datasheet is for an analog column clock of 1 MHz, for which, the sample clock is 250 kHz. So the conversion time is 6 times the sample clock period i.e. ( 6 * 1/250 kHz) or 24 μS.